DSCC V62/23622A:2024
Current
Current
The latest, up-to-date edition.
MICROCIRCUIT, DIGITAL, 2 V to 5.5 V, LOW NOISE, 8 BIT SHIFT REGISTER WITH THREE STATE OUTPUTS, MONOLITHIC SILICON
Published date
10-07-2024
Publisher
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This drawing documents the general requirements of a high performance 2 V to 5.5 V, low noise, 8 bit shift register with three state outputs microcircuit, with an operating temperature range of -55°C to +125°C.
| DocumentType |
Revision
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| ProductNote |
This standard also refers toJEDEC PUB 95
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| PublisherName |
Defense Supply Centre Columbus
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| Status |
Current
|
| Supersedes |
| JEDEC JEP155:2008 | RECOMMENDED ESD TARGET LEVELS FOR HBM/MM QUALIFICATION |
| JEDEC JEP 157 : 2009 | RECOMMENDED ESD-CDM TARGET LEVELS |
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