I.S. HD 524:S1 1990
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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MICROPROCESSOR SYSTEM BUS FOR 1 TO 4 BYTE DATA
12-01-2013
27-01-1995
Describes a high performance back-plane bus for use in microprocessor based systems. The parallel bus supports single and block transfer cycles on a 32-bit non-multiplexed address and data highway. Transmission is governed by an asynchronous handshaking protocol. The bus allocation provides for multiprocessor architectures. This bus also supports inter-module interrupts for facilitating quick response to internal and external events. The mechanics of the boards and chassis are based on HD 493: Dimensions of Panels and Racks.
| DocumentType |
Standard
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| PublisherName |
National Standards Authority of Ireland
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| Status |
Superseded
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| SupersededBy |