DIN 41870-9:1986-09
Withdrawn
Withdrawn
OUTLINES FOR SEMICONDUCTOR DEVICES AND INTEGRATED CIRCUITS - OUTLINE FAMILY 20A
Published date
01-12-2013
Withdrawn date
07-23-2013
Sorry this product is not available in your region.
Kein Inhaltsverzeichnis in der Norm vorhanden.
| DevelopmentNote |
Supersedes DIN 41866-1 (07/2002)
|
| DocumentType |
Standard
|
| PublisherName |
German Institute for Standardisation (Deutsches Institut für Normung)
|
| Status |
Withdrawn
|
| Supersedes |
| DIN 41870-1:1969-04 | CASES FOR SEMICONDUCTOR DEVICES AND INTEGRATED CIRCUITS; SHORT DESIGNATIONS |
| DIN 41870-2:1983-07 | CASES FOR SEMICONDUCTOR DEVICES AND INTEGRATED CIRCUITS; SURVEY, TERMINAL COVERING |
| IEC 60191-2L:1982 | Eleventh supplement |
Summarise
Sorry this product is not available in your region.