IEEE 1364-1995
Superseded
Superseded
View Superseded by
IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language
Available format(s)
PDF
Language(s)
English
Published date
10-14-1996
Superseded date
12-11-2009
Superseded by
US$273.24
Excluding Tax where applicable
| Committee |
Design Automation
|
| DocumentType |
Standard
|
| Pages |
688
|
| PublisherName |
Institute of Electrical & Electronics Engineers
|
| Status |
Superseded
|
| SupersededBy |
| IEEE 1800-2012 | IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language |
| IEEE 1800-2009 REDLINE | IEEE Standard for SystemVerilog--Unified Hardware Design, Specification, and Verification Language |
| IEEE/IEC 62530-2011 | IEEE/IEC International Standard - SystemVerilog -- Unified Hardware Design, Specification, and Verification Language |
Summarise
US$273.24
Excluding Tax where applicable
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