JESD22-A111B:2018
Superseded
Superseded
Evaluation Procedure for Determining Capability to Bottom Side Board Attach by Full Body Solder Immersion of Small Surface Mount Solid State Devices
Available format(s)
Hardcopy , PDF
Language(s)
English
Published date
03-01-2018
Publisher
Superseded date
01-13-2026
Free
Excluding Tax where applicable
This evaluation procedure is written to provide users of ICs of small surface mount packages with a method to evaluate the capability of a device to withstand full wave solder immersion.
| Committee |
JC-14.1
|
| DocumentType |
Revision
|
| Pages |
22
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Superseded
|
| Supersedes |
| JEDEC JEP30-A100A:2023 | Part Model Assembly Process Classification Guidelines for Electronic-Device Packages – XML Requirements |
| JEDEC JEP30-A100B:2024 | Part Model Assembly Process Classification Guidelines for Electronic-Device Packages – XML Requirements |
Summarise
Free
Excluding Tax where applicable