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IEEE 1450.1-2005

Withdrawn

Withdrawn

IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450-1999) for Semiconductor Design Environments

Available format(s)

PDF

Language(s)

English

Published date

09-30-2005

Withdrawn date

03-24-2022

US$427.68
Excluding Tax where applicable

Structures are defined in STIL to support usage as semiconductor simulation stimulus, including (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution of pattern constructs.

Committee
Test Technology
DocumentType
Standard
ISBN
978-0-7381-4733-8
Pages
124
PublisherName
Institute of Electrical & Electronics Engineers
Status
Withdrawn

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US$427.68
Excluding Tax where applicable