JEDEC JEP150A:2023
Current
Stress-Test-Driven Qualification of and Failure Mechanisms Associated with Assembled Solid State Surface-Mount Devices
Hardcopy , PDF
English
12-01-2023
The electronics industry has qualification standards for loose devices (e.g., JESD47, JESD94), printed wiring boards (PWBs) (e.g., IPC standards), and 2nd level interconnect reliability (i.e., solder joints) (e.g., IPC standards) that are performed as separate activities.
| DocumentType |
Standard
|
| Pages |
30
|
| PublisherName |
JEDEC Solid State Technology Association
|
| Status |
Current
|
| Supersedes |
| JEDEC JESD61A.01:2007 | ISOTHERMAL ELECTROMIGRATION TEST PROCEDURE |
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