HD 524 : 200S1
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
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MICROPROCESSOR SYSTEM BUS FOR 1 TO 4 BYTE DATA
12-01-2013
23-07-2013
Describes a high performance backplane bus for use in microprocessor based systems. This parallel bus supports single and block transfer cycles on a 32-bit non-multiplexed address and data highway. Transmission is governed by an asynchronous handshaken protocol. The bus allocation provides for multiprocessor architectures. This bus also supports inter-module interrupts for facilitating quick response to internal and external events. The mechanics of the boards and chassis are based on IEC Publication 297: Dimension of Panels and Racks. Note. - This bus is similar to the VME bus.
| DocumentType |
Standard
|
| PublisherName |
Harmonization Documents
|
| Status |
Superseded
|
| SupersededBy |
| Standards | Relationship |
| NFC 96 031-2 : 1990 | Identical |
| NFC 96 031-1 : 1990 | Identical |
| IEC 60821:1991 | Identical |