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IEC 61523-1:2012

Superseded

Superseded

A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.

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Delay and power calculation standards - Part 1: Integrated circuit delay and power calculation systems

Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

21-06-2012

Superseded date

11-10-2023

Superseded by

IEC 61523-1:2023

£430.19
Excluding VAT
Summarise this standard

1 Overview
2 Normative references
3 Definitions
4 Acronyms and abbreviations
5 Typographical conventions
6 DPCS flow
7 Delay calculation language (DCL)
8 Power modeling and calculation
9 Application and library interaction
10 Procedural interface (PI)
11 Parasitics
Annex A (normative) - Implementation requirements
Annex B (informative) - IEEE List of Participants

IEC 61523-1:2012(E) focuses on delay and power calculation for integrated circuit design with support for modeling logical behavior and signal integrity. This second edition cancels and replaces the first edition, published in 2001, and constitutes a technical revision.

Committee
TC 91
DevelopmentNote
Also numbered as IEEE 1481. (06/2012) Stability Date: 2015. (10/2012)
DocumentType
Standard
Pages
630
PublisherName
International Electrotechnical Committee
Status
Superseded
SupersededBy
Supersedes

Standards Relationship
CEI EN 61523-1 : 2003 Identical
EN 61523-1:2002 Identical
DIN EN 61523-1:2002-10 Identical
NEN EN IEC 61523-1 : 2002 Identical
PN EN 61523-1 : 2004 Identical
I.S. EN 61523-1:2002 Identical

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A newer version of this standard is available.

View Current Edition
£430.19
Excluding VAT