BS EN 62137-4:2014

1 Scope
2 Normative references
3 Terms definitions and abbreviations
4 General
5 Test apparatus and materials
6 Specimen preparation
7 Temperature cycling test
8 Temperature cycling life
9 Items to be specified in the relevant
  product specification
Annex A (informative) - Acceleration of the
        temperature cycling test for solder joints
Annex B (informative) - Electrical continuity test
        for solder joints of the package
Annex C (informative) - Reflow solderability test
        method for package and test substrate land
Annex D (informative) - Test substrate
        design guideline
Annex E (informative) - Heat resistance to reflow
        soldering for test substrate
Annex F (informative) - Pull strength measurement
        method for the test substrate land
Annex G (informative) - Standard mounting
        process for the packages
Annex H (informative) - Mechanical stresses
        to the packages
Bibliography
Annex ZA (normative) - Normative references
         to international publications with their
         corresponding European publications

Defines the test method for the solder joints of area array type packages mounted on the printed wiring board to evaluate solder joint durability against thermo-mechanical stress.

This part of IEC 62137 specifies the test method for the solder joints of area array type packages mounted on the printed wiring board to evaluate solder joint durability against thermo-mechanical stress.

This part of IEC 62137 applies to the surface mounting semiconductor devices with area array type packages (FBGA, BGA, FLGA and LGA) including peripheral termination type packages (SON and QFN) that are intended to be used in industrial and consumer electrical or electronic equipment.

An acceleration factor for the degradation of the solder joints of the packages by the temperature cycling test due to the thermal stress when mounted, is described Annex A.

Annex H provides some explanations concerning various types of mechanical stress when mounted.

The test method specified in this standard is not intended to evaluate semiconductor devices themselves.

NOTE 1 Mounting conditions, printed wiring boards, soldering materials, and so on, significantly affect the result of the test specified in this standard. Therefore, the test specified in this standard is not regarded as the one to be used to guarantee the mounting reliability of the packages.

NOTE 2 The test method is not necessary, if there is no stress (mechanical or other) to solder joints in field use and handling after mounting.