IPC SM 782 : A1993 AMD 2 1999
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
SURFACE MOUNT DESIGN AND LAND PATTERN STANDARD
02-01-2005
01-12-2013
1.0 SCOPE
1.1 Purpose
1.2 Performance Classification
1.3 Assembly Types
1.4 Presentation
1.5 Profile Tolerances
1.6 Land Pattern Determination
2.0 APPLICABLE DOCUMENTS
2.1 IPC
2.2 Electronic Industries Association
2.3 Joint Industry Standards (IPC)
2.4 American Society of Mechanical Engineers
3.0 DESIGN REQUIREMENTS
3.1 Terms and Definitions
3.2 Component Acronyms
3.3 Dimensioning Systems
3.4 Design for Producibility
3.5 Environmental Constraints
3.6 Design Rules
3.7 Outer Layer Finishes
4.0 QUALITY AND RELIABILITY VALIDATION
4.1 Validation Techniques
4.2 Test Patterns-In-Process Validator
4.3 Stress Testing
5.0 TESTABILITY
5.1 Testing Considerations
5.2 Nodal Access
5.3 Full Nodal Access
5.4 Limited Nodal Access
5.5 No Nodal Access
5.6 Clam Shell Fixtures Impact
5.7 Printed Board Test Characteristics
6.0 PACKAGING AND INTERCONNECTING STRUCTURE TYPES
6.1 General Considerations
6.2 Organic-Base Material P&IS
6.3 Non-Organic Base Materials
6.4 Supporting-Plane P&I Structures
6.5 Constraining Core P&I Structures
7.0 ASSEMBLY CONSIDERATIONS FOR SURFACE MOUNT TECHNOLOGY
(SMT)
7.1 SMT Assembly Process Sequence
7.2 Substrate Preparation Adhesive, Solder Paste
7.3 Component Placement
7.4 Soldering
7.5 Cleaning
7.6 Repair/Rework
8.0 DISCRETE COMPONENTS
8.1 Chip Resistors
8.2 Chip Capacitors
8.3 Inductors
8.4 Tantalum Capacitors
8.5 Metal Electrode Face (MELF) Components
8.6 Small Outline Transistor (SOT)
8.7 Small Outline Transistor (SOT)
8.8 Small Outline Diode (SOD)
8.9 Small Outline Transistor (SOT)
8.10 Small Outline Transistor (SOT)
8.11 Modified Through-Hole Component (TO)
9.0 COMPONENTS WITH GULLWING LEADS ON TWO SIDES
9.1 Small Outline Integrated Circuits (SOIC)
9.2 Small Outline Integrated Circuits (SSOIC)
9.3 Small Outline Package Integrated Circuit
(SOPIC)
9.4 Thin Small Outline Package
9.5 Ceramic Flat Pack (CFP)
10.0 COMPONENTS WITH J LEADS ON TWO SIDES
10.1 Small Outline Integrated Circuits with J Leads
(SOJ)-7.63 mm [0.300] Body Size
10.2 Small Outline Integrated Circuits with J Leads
(SOJ)-8.88 mm [0.350] Body Size
10.3 Small Outline Integrated Circuits with J Leads
(SOJ)-10.12 mm [0.400] Body Size
10.4 Small Outline Integrated Circuits with J Leads
(SOJ)-11.38 mm [0.450] Body Size
11.0 COMPONENTS WITH GULLWING LEADS ON FOUR SIDES
11.1 Plastic Quad Flat Pack (PQFP)
11.2 Shink Quad Flat Pack (SQFP), Square
11.3 Shrink Quad Flat Pack (SQFP), Rectangular
11.4 Ceramic Quad Flat Pack (CQFP)
12.0 COMPONENTS WITH J LEADS ON FOUR SIDES
12.1 Plastic Leaded Chip Carrier (PLCC), Square
12.2 Plastic Leaded Chip Carrier (PLCC), Rectangular
12.3 Leadless Ceramic Chip Carrier (LCC)
13.0 MODIFIED DUAL-IN-LINE PIN (DIP) COMPONENTS
13.1 DIP
14.0 COMPONENTS WITH BALL GRID ARRAY CONTACTS
14.1 Plastic Ball Grid Array
14.2 1.27 mm Pitch Rectangular PBGA JEDEC
MS-028
Figures
Tables
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